“Revisiting RowHammer: An Experimental Analysis of Modern DRAM Devices and Mitigation Techniques”, 2020-05-27 (; similar):
In order to shed more light on how RowHammer affects modern and future devices at the circuit-level, we first present an experimental characterization of RowHammer on 1,580 DRAM chips (408 DDR3, 652 DDR4, and 520 LPDDR4) from 300 DRAM modules (60 DDR3, 110 DDR4, and 130 LPDDR4) with RowHammer protection mechanisms disabled, spanning multiple different technology nodes from across each of the 3 major DRAM manufacturers.
Our studies definitively show that newer DRAM chips are more vulnerable to RowHammer: as device feature size reduces, the number of activations needed to induce a RowHammer bit flip also reduces, to as few as 9.6k (4.8k to two rows each) in the most vulnerable chip we tested.
We evaluate 5 state-of-the-art RowHammer mitigation mechanisms using cycle-accurate simulation in the context of real data taken from our chips to study how the mitigation mechanisms scale with chip vulnerability.
We find that existing mechanisms either are not scalable or suffer from prohibitively large performance overheads in projected future devices given our observed trends of RowHammer vulnerability.
Thus, it is critical to research more effective solutions to RowHammer.